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Tutoriel conception PCB : règles, fichiers et conseils

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Printed Circuit Design Tutorial

Executive Summary

Gold Phoenix has supplied PCB boards to customers in North America since 2003, and over the years engineering and purchasing teams have asked the same set of questions about PCB design rules, manufacturing constraints, and common layout mistakes. This tutorial gathers those questions into a practical guide.

The guide is organized in three parts: basic design rules, the manufacturing techniques that constrain your layout (panelization, drilling, surface finish), and the data files you hand to a fabrication house. Each chapter below corresponds to one step in the printed-circuit design tutorial series and links out to a dedicated reference article.

It assumes a schematic is ready and covers the manufacturing-side rules that CAD tools do not enforce by default — the dimension limits, panelization choices, and file conventions where most customer rework originates. Use the Section block at the bottom to jump to any individual tutorial chapter.

1. Board Size and Shape

The board outline is defined on the mechanical layer of the CAD file, so the fabricator can see the exact shape, mounting holes, and any internal cuts as a dimensioned drawing. This includes the board edge, slot openings, and keep-out zones where connectors or mechanical shields must fit.

Getting the outline right early avoids the most expensive kind of rework — changing dimensions after artwork is routed. The mechanical layer should be exported as a separate drawing, with overall size, thickness, and tolerance called out. The reference below shows how to set up the outline and internal cuts cleanly.

Related: Board Size and Shape — outline, mechanical layer, and internal cuts.

2. Define Design Rules

Once the outline is set, the design rules define what the CAD tool allows: minimum trace width and spacing, pad annular rings, drill-to-copper clearance, and via sizes. Setting these before routing forces the layout to stay within the fabricator capability rather than catching issues at CAM review.

Rules also cover electrical constraints such as controlled impedance for high-speed nets. The reference below walks through how to enter rule sets in a typical PCB editor and how to confirm them against your fabricator’s design capability.

Related: Define the Design Rules — trace, spacing, and via rule setup in the CAD tool.

3. V-Scoring

V-scoring is the standard breakaway method for rectangular panels: a V-shaped groove is cut halfway through each panel edge, leaving a thin fiber web that snaps apart after assembly. It is the lowest-cost depaneling method for straight-edged boards.

Score depth is set by board thickness — typically one-third to one-half of the board thickness from each side — and it cannot be used on boards thinner than about 0.6 mm or on irregular outlines. The reference below shows the V-score drawing convention and when to choose it over tab routing.

Related: V Score — V-cut breakaway method and depth rules.

4. Tab-Routing

When boards have irregular shapes or need a fully routed edge, the panel uses tab routing: small tabs with mouse-bite holes connect each board to the panel rail, and boards are broken or router-separated after assembly. This is the default method for non-rectangular or rounded boards.

Tab count, size, and placement depend on board thickness and assembly flow; for production-scale panel design, see the PCB panelization guidelines reference. The chapter below shows the tab-routing drawing convention and typical mouse-bite dimensions.

Related: Tab-Routing — mouse-bite tabs and irregular outlines.

5. Non-Plated Holes (NPTH)

Non-plated holes are drilled but not copper-plated on the wall, used for mounting, tooling, and mechanical fasteners where electrical contact is not needed. They must be isolated from any copper feature by a clearance annulus, or plating will short to the hole wall.

Designers often define NPTH by diameter in the CAD tool — for example, all 40 mil holes designated as non-plated — and the drill file must match the solder mask and paste layers. The reference below explains how to flag NPTH holes and avoid common plating errors.

Related: Define Non-Plated Holes (NPTH) — non-plated mounting holes and clearance rules.

6. PCB Surface Finishing

Exposed copper pads oxidize quickly, so a surface finish coats them to preserve solderability and shelf life. The main options — HASL, ENIG, ENEPIG, immersion silver, immersion tin, and OSP — each balance cost, planarity, and contact durability for different assembly needs.

Finish choice depends on the assembly process, component pitch, and storage conditions. Flat finishes such as ENIG suit fine-pitch SMT and BGA, while HASL keeps cost down for simpler boards. The reference below compares finish types and how to choose.

Related: PCB Finishing (Surface Finish) — finish types, pros, cons, and selection.

7. Solder Mask

Solder mask is a polymer coating over copper traces that leaves only the solderable pads exposed, preventing solder bridges between adjacent pads and protecting copper from oxidation. It is applied as a wet film and cured before assembly.

Mask openings are sized slightly larger than pads to account for registration tolerance, but on fine-pitch parts the opening-to-pad ratio must be controlled to avoid bridging or wetting issues. The reference below covers mask colors, opening rules, and common design mistakes.

Related: Solder Mask — polymer coating, colors, and opening rules.

8. Silkscreen

Silkscreen (legend) is the ink printed on top of the mask to carry reference designators, polarity marks, pin-one indicators, and revision numbers. White ink is standard; black silkscreen is also available for contrast on dark mask colors.

Legend must stay off pads, vias, and fiducials, and letter height must meet the fabricator minimum to stay legible after reflow. The reference below shows placement rules and minimum line and height dimensions.

Related: Silk Screen — legend placement and minimum dimensions.

9. Copper Thickness and Via Current Handling

Copper weight is measured in ounces per square foot; 1 oz copper is about 35 µm thick. Thicker copper allows traces to carry more current, but also requires wider isolation spacing and larger drill caps.

A via’s current capacity is roughly equivalent to a trace of the same cross-section, so barrel area and plating thickness matter. The reference below explains how to estimate current handling for a given copper weight and drill size.

Related: Copper Thickness and Via Current — copper weight and current capacity estimates.

10. Via Design

Vias connect layers inside the stack-up. The types of vias — through, blind, buried, and micro — differ in cost and routing density; through vias are cheapest but occupy space on every layer.

For vias left exposed on the surface, the choice between via tenting vs filling changes flatness and via-in-pad feasibility. The reference below covers how to estimate via current handling and drill-to-pad rules.

Related: Via — via types, current handling, and drill rules.

11. Slot Design

Slots are cutouts within a board or panel for connectors, mating edges, or mechanical alignment. They are defined on the mechanical layer and must be clearly called out so the fabricator knows they are routed cuts, not drill holes.

Common mistakes include leaving slots as drill-file features or omitting them from the mechanical drawing, which causes the fabricator to guess. The reference below explains how to document slots unambiguously.

Related: Slot — cutouts and mechanical layer documentation.

12. Voltage Break Points

Voltage break points (also called breakaway rails or score rails) are sections of a panel that will be separated after electrical test or assembly, isolating board sections that would otherwise short across the rail. They also relate to creepage and clearance distances between conductors at different potentials.

UL testing has shown that parallel conductor spacing must be sufficient to withstand the rated voltage without arcing. The reference below explains where to place voltage break points and how to calculate minimum creepage gaps.

Related: Voltage Break Points — breakaway rails and creepage gaps.

13. Half-Hole Design

Half holes (castellated holes) are plated holes cut in half along the board edge, used for board-to-board mating or to mount a board perpendicular to another PCB. The plated half-wall becomes a solderable side pad.

Half holes require special routing and plating steps, and the hole must be positioned so the fabricator can control the cut through the center of the barrel. The reference below shows the edge-placement and tolerance rules.

Related: Half-Hole Design — castellated edge pads and placement rules.

14. Prepare Manufacture Files

The most common file-generation mistake is missing layers: a 2-layer board package must include top and bottom copper, soldermask, silkscreen, paste (if assembly), and the NC drill file, plus a stack-up note for multilayer boards.

Naming files by layer and versioning by board revision prevents CAM confusion. The reference below gives the complete Gerber and drill export checklist and the file conventions to hand off cleanly.

Related: Prepare Manufacture Files — Gerber and drill export checklist.

Printed Circuit Design Tutorial

Section

1. Basic rules in PCB Design : The size and shape of the PCB

2. Basic rules in PCB Design : Define the design rules for the PCB

3. Printed Circuit Design Tutorial (A. V Score)

4. Printed Circuit Design Tutorial (B. Tab-routing)

5. Printed Circuit Design Tutorial (C. Define Non-plated holes - NPTH)

6. Printed Circuit Design Tutorial (D. PCB finishing)

7. Printed Circuit Design Tutorial (E. Solder mask)

8. Printed Circuit Design Tutorial (F. Silk Screen)

9. Printed Circuit Design Tutorial (G. Copper thickness and Via current handling capacity)